1. Field of the Invention
The present invention relates to a Dynamic Random Access Memory (DRAM) and a refresh method thereof, and more specifically, relates to a DRAM and refresh method thereof that enables reduction in data retention current.
2. Background of the Invention
In battery-driven devices such as portable telephones, it is important to reduce the power consumption of semiconductor devices used therein in order to extend battery life. With respect to memory devices such as, for example, Static Random Access Memories (SRAMs) having cells each composed of 6 transistors can retain data with low electrical current.
However, memory capacities required for SRAMs have been increasing and thus the technology with a ground rule of approximately 0.2 to 0.13 μm is impractical in the case of, for example, 32 Mb or 64 Mb SRAMs in as much as the chip sizes increase to an extreme extent. The memory capacities required by the battery-driven devices has been continually increasing.
DRAMs for replacing SRAMs have recently become available. However, DRAMs require refreshing of the memory cells. The standby current of the DRAMs in the state of retaining data is relatively larger than that of the SRAMs.
DRAMs of the type having a mode wherein the data retention is limited to a minimum necessary number of cells and only that part is subjected to refreshing have become available. For example, as shown in FIG. 7, only 8 Mb or 4 Mb cells are refreshed in a 32 Mb memory array 40. Even in this case, the refresh of the 8 Mb or 4 Mb cells is constantly required and thus the consumption current is relatively larger compared to 8 Mb or 4 Mb SRAMs. It is not possible to totally replace the SRAMs with the DRAMs.
In devices such as portable telephones, there is such a type wherein a multi-chip package is used that is a combination of a large capacity DRAM (32 to 64 Mb) and a small-capacity low-current backup SRAM (4 to 8 Mb). However, even in this case, low price and low current is not achieved.
A DRAM with low power consumption and low cost that has a mode of refreshing only part of the memory cells, thereby eliminating the need for SRAM, and further provide a refresh method thereof is desired.